Such a circuit arrangement is known from German Patent Application No. 2,802,626 as a phase-locked loop, for example, for locking the frequency of an oscillator to a reference frequency or a multiple or part of the said frequency. The known circuit arrangement has a phase comparator arrangement for comparing the phases of first and second input signals which are supplied as substantially square-wave or trapezoidal analog signals. The phase difference between these two signals is measured in a first and a second comparator, the second comparator having a phase difference range of less than 180.degree. and the first comparator having a much larger phase difference range than the second. If the phase difference between the input signals is greater than the range of the second comparator, the known phase comparator arrangement derives an output signal corresponding to the phase difference from the first comparator, whereas the output signal is derived from the second comparator arrangement when the phase difference falls within the range of the second comparator arrangement. In this way, coarse phase comparison is achieved with the first comparator arrangement and fine phase comparison with the second comparator arrangement. This ensures locking of the phase-locked loop from any phase differences of the input signals.
In principle, such a circuit arrangement can also be used to advantage when, instead of analog input signals, the phases of digital signals are to be compared. Digital signals are taken here to mean signals which consist of a time-discrete sequence of amplitude-discrete values. Such signals are restricted in their time resolution by the repetition rate of the amplitude-discrete values. This repetition rate also determines the resolution for the phase comparison, i.e. the lowest detectable phase difference between the input signals. If precise determination of this phase difference is required, the input signals must exhibit a high time resolution by using a high repetition rate for the amplitude-discrete values. However, such high repetition rates require high signal processing rates, i.e. high clock rates for which control signals with very high frequencies are needed. Such high-frequency signals, however, cannot be processed with the known circuit arrangements.